Because of registers, instructions need to be able to specify memory locations and registers. Some architectures allow an “instruction” to specify a mixture of registers and memory. Instruction is in quotes because this I am referring to mnemonic, as opposed to opcode. A single mnemonic can have any number of opcodes corresponding to it. Architectures that permit mnemonics to choose between registers and memory are typically conventional CISCs (complex instruction set computers).
Other architectures, however, partitions instructions so that only certain instructions can access memory. This scheme enjoys the benefit of an extremely small number of opcodes. Most architectures that partition memory access instructions are RISCs (reduced instruction set computers).